Ultrapure Water Starts With Better Pretreatment
Reinventing Semiconductor Water Purification with VSEP® Vibratory Membrane Filtration
The Increasing Demand for Ultrapure Water in Semiconductor Manufacturing
Semiconductor fabs rely on ultrapure water (UPW) at every step of wafer production, from cleaning to rinsing to chemical dilution. As device geometries shrink and node technologies advance, purity standards become even more extreme. Modern fabs require water with:
- 18.18 MΩ·cm resistivity
- < 1 ppb silica
- ppt‑level organic carbon
- near‑zero particles
Achieving this consistently begins with reliable pretreatment. But as many fabs discover, raw water quality is not guaranteed.
Typical Treatment Process to Produce Ultrapure Water (UPW)
Producing UPW requires multiple sequential treatment steps in three categories: Pretreatment, RO Filtration, and Polishing.
1 Primary Treatment (Raw Water → RO Feed Water)
Step 1: Coarse Filtration – Remove sand, silt, rust, and debris using sand filters or cartridge prefilters
Step 2: Chemical Conditioning – Using coagulation / flocculation to agglomerate colloids, pH adjustment, and dechlorination (sodium bisulfite) if needed because chlorine damages RO membranes
Step 3: Activated Carbon Treatment – Removes: residual chlorine/chloramine, organic contaminants, and taste and odor compounds
Step 4: Cartridge Prefiltration – Typically 5 µm → 1 µm → 0.5 µm in series, staged to protect RO.
2 High‑Purity Treatment (RO Feed → DI Water)
Step 5: Reverse Osmosis (RO) – Results in major reduction of: dissolved solids (90–99%), bacteria, and organic carbon. Most semiconductor fabs use double‑pass RO for added purity and to minimize silica and organics.
Step 6: UV Oxidation (185 nm) – Breaks down remaining organics into smaller components for later removal. Also reduces residual TOC (total organic carbon).
Step 7: Ion Exchange / EDI (Electrodeionization) Removes: almost all remaining ions, silica, and weakly ionized species. This produces: “polished” deionized water (DI) with a resistivity of 15–18 MΩ·cm
3 Final Polishing to Ultra‑Pure Water (UPW)
This stage elevates DI water to semiconductor‑grade.
Step 8: Submicron Filtration (0.05 µm or smaller) – Removes endotoxins and ultrafine particles.
Step 9: Degasification – Removes dissolved gases: CO₂ (improves resistivity) and O₂ (prevents corrosion and microbial growth)
Step 10: Ultrafiltration (UF) – Removes: colloids, macromolecules, and trace organics. Achieves particle levels in part per trillion range.
Step 11: Final UV and Polishing Filters – including 254 nm UV → sterilization and 0.02 µm final filters just before the point of use
Step 12: UPW Distribution Loop – Maintains purity with:
- high flow velocities
- sanitary piping (usually polished stainless steel)
- constant recirculation
- continuous monitoring for:
- resistivity
- TOC
- particles
- silica
- dissolved oxygen
This is a very complex multi-step process where each step generates a waste brine and where the entire process hinges on good upfront pretreatment when the raw water is challenging.
When Raw Water Isn’t Clean Enough: The Pretreatment Challenge
Many semiconductor plants rely on river water, surface water, or seasonally variable sources. These sources often contain:
- Microorganisms and biofilm‑forming species
- Algae and algal toxins
- Humic and fulvic organic matter
- High turbidity and suspended solids
- Seasonal spikes in biological load
Such loading can overwhelm conventional pretreatment systems:
- Media filters clog
- Coagulation demand rises
- Sludge volumes increase
- Backwash cycles cause downtime
- RO feedwater quality becomes unstable
This instability ultimately threatens the integrity of downstream RO, EDI, and UPW polishing systems.
A Proven Alternative: VSEP® UF for Advanced Raw Water Pretreatment
One Step. High Recovery. No Frequent Media Replacement. No Downtime.
A major semiconductor manufacturer in Hokkaido, Japan, faced these exact challenges when treating biologically rich river water. Their conventional media‑based pretreatment system could not reliably produce the consistent, particle‑free feedwater required by their RO spiral system.
VSEP® (Vibratory Shear Enhanced Processing) Ultrafiltration provided the solution.
How VSEP UF Works
Unlike crossflow membranes that rely on high‑velocity laminar flow, VSEP uses torsional vibration to generate intense shear at the membrane surface. This prevents fouling, even with high‑solids or high‑organics water.
With only minimal prescreening, VSEP UF can:
- Replace multi‑stage media and clarification systems
- Handle high turbidity and biological loads without plugging
- Maintain stable, high flux rates
- Eliminate frequent filter media replacement
- Produce consistent, low‑SDI permeate ideal for RO
- Remove bacteria (unlike the pretreatment steps shown above)
This reduces pretreatment complexity from several unit operations to one self‑cleaning membrane system.
Benefits of VSEP UF for Semiconductor Water Plants
- Superior Raw Water Handling – Treats challenging surface waters or brackish groundwater that would overwhelm media filters and cartridge systems.
- RO Protection – Delivers stable, low‑turbidity, low‑SDI permeate that maximizes RO membrane lifespan and uptime.
- Minimal Maintenance – No media beds to replace. No backwash downtime. No chemical sludge generation.
- High Throughput With Consistent Flux – Vibratory shear prevents fouling and maintains long-term performance.
- Lower Total Cost of Ownership – Fewer process steps → less equipment → lower operating cost.
VSEP UF Hokkaido River Water Semiconductor Installation
VSEP RO: Another Option to Close the Loop for High Recovery & ZLD
Beyond pretreatment, semiconductor plants produce multiple reject streams from each step of the UPW system:
- RO concentrate
- EDI reject
- Regeneration wastes
- Rinse waters
- Backwash
These streams are often sent to wastewater treatment or sewer, losing valuable water that has been partially treated at great cost.
With VSEP RO, these reject streams can be recycled to replace raw water intake resulting in:
- High overall plant water recovery
- Minimization of wastewater volume
- Reduced chemical usage
- A feasible pathway to ZLD (Zero Liquid Discharge)
This is particularly important for fabs in regions with water scarcity or strict discharge regulations and those with bold sustainability goals. A semiconductor plant consuming 5 MGD of raw water, will discharge nearly half of that as wastewater.
How Much of a 5 MGD Fab Plant Becomes Wastewater?
A typical semiconductor UPW plant has multiple stages that each create losses:
- Pretreatment losses – Media filtration backwash, clarifier sludge, and cartridge filter change‑outs can result in 3–10% water losses.
- Reverse Osmosis (RO) losses
Single‑pass RO recovery: 70–85%
Double‑pass RO recovery: 75–90%
This results in a typical combined RO loss of 10–25% if the second pass reject is sent back to the first pass feedwater.
- EDI concentrate + polishing reject streams – EDI rejects 3–10% and UV / UF / MF rinsing + cleaning can waste 1–3%
- UPW distribution loop losses – Rinse tanks, tool dumps, periodic sanitization can waste 1–5%
Total Wastewater Loss Range – Summing all losses:
Low‑loss, optimized plant:
3–10% + 10–15% + 3–5% + 1–3% = 17–33% total wasted water
High‑loss, challenging raw water plant:
10% + 20–25% + 8–13% + 3–5% = 41–53% total wasted water
Applying These Percentages to a 5 MGD Raw Water Input
Scenario A: Optimized system (17–33% wastewater)
Wastewater = 5 MGD × 0.17 to 0.33 – 850k to 1,650k gpd of wastewater
Scenario B: Challenging raw water (41–53% wastewater)
Wastewater = 5 MGD × 0.41 to 0.53 = 2.1 to 2.7 MGD of wastewater
There is a significant cost in treating this wastewater only to throw it away. This water has been partially treated and there has been a cost for this as well.
Based on typical fab operations and mixed raw water sources: ≈ 30–50% of raw water becomes wastewater
Limits of Conventional Spiral RO and How VSEP RO Goes Beyond Them
Traditional spiral RO systems are highly effective at removing dissolved ions, but their maximum recovery is fundamentally limited by water chemistry. As water passes through each RO stage, the dissolved solids in the remaining concentrate increase. Eventually, concentrations of silica, hardness, sulfate, metals, and other sparingly soluble salts reach their solubility limits. Exceeding these limits can cause scale formation on the membrane surface. Once this occurs, the system must be stopped, cleaned, or operated at lower recovery to avoid fouling. For this reason, even multi‑stage RO systems typically plateau at 70–85% recovery, and higher recoveries become impractical without significant chemical softening or pretreatment.
VSEP® breaks this barrier.
Instead of relying on high crossflow velocity to control fouling, VSEP uses intense vibratory shear at the membrane surface to prevent solids from depositing. This allows the concentrate to exceed solubility limits without forming scale on the membrane, because the solids remain suspended and dispersed rather than being saturated at the surface of the membrane.
As concentrations rise further, salts begin to crystallize within the bulk liquid, not on the membrane surface. In this mode, VSEP effectively acts as a membrane crystallizer, enabling recoveries far beyond the thermodynamic limits of conventional RO. Concentration factors of 10×–30× are achievable, allowing plants to dramatically reduce brine volume or feed a smaller, more efficient downstream ZLD system.
By lifting the traditional barriers imposed by solubility, VSEP provides a powerful pathway to ultra‑high recovery, minimal wastewater, and true Zero Liquid Discharge, all while avoiding the scaling and downtime that constrain conventional RO.
A Complete Water‑Optimization Strategy for Semiconductors
VSEP UF
→ Robust raw water pretreatment
→ Protection for RO and UPW systems
→ Stable, high‑quality feedwater
VSEP RO
→ Treatment of reject streams
→ Dramatically higher recovery
→ Reduced wastewater
→ ZLD‑ready operations
Together, these technologies help semiconductor manufacturers secure a reliable, sustainable, and high‑purity water supply, regardless of raw water source.
Ready to Modernize Your Ultrapure Water Pretreatment?
Discover how VSEP can improve reliability, reduce risk, and lower operating cost for your UPW system.
Request a technical evaluation: info@vsep.com
Chitose River raw water study: Hokkaido Case Study
Learn about pilot testing options: https://www.vsep.com/technology/pilot-testing/
About New Logic Research
New Logic Research, Inc. is the inventor and manufacturer of the VSEP® Vibratory Membrane Filtration System, a breakthrough technology designed to solve the toughest separation and filtration challenges across industry. Founded in 1987 in Emeryville, California, the company pioneered the use of vibratory shear to prevent membrane fouling, enabling reliable treatment of high‑solids, high‑organics, and otherwise “unfilterable” process streams.
For more than three decades, New Logic has delivered advanced membrane systems for semiconductor manufacturing, power generation, chemicals, mining, landfill leachate treatment, and zero‑liquid‑discharge (ZLD) applications. With hundreds of installations worldwide, VSEP systems provide major reductions in water use, waste volume, energy consumption, and environmental impact.
Driven by a commitment to innovation, sustainability, and engineered performance, New Logic Research continues to expand the boundaries of what membrane filtration can achieve, helping industries reuse more water, reduce operating costs, and meet increasingly strict environmental requirements.